š§® 1. Why smaller fields make zkVMs faster
Your question:
Why does using a smaller field lead to a more efficient zkVM?
Key points you learned:
- Smaller fields (like BabyBear ā 31 bits, Goldilocks ā 64 bits) fit in native CPU words, so arithmetic uses direct machine instructions ā no big-integer libraries needed.
- Large fields (like BN254, 254 bits) require multi-limb (big-int) arithmetic:
- Numbers are split across several 64-bit ālimbs.ā
- Each multiplication becomes many partial multiplications plus modular reduction.
- With small fields, FFTs, NTTs, and polynomial operations are faster and memory-lighter, because everything fits neatly in registers and cache.
- Smaller fields also mean smaller proofs (fewer bytes per element).
ā In short: small fields give native-speed math and smaller data, so the zkVM runs dramatically faster.
āļø 2. Why āsmallerā doesnāt mean āas small as possibleā
Your question:
So if a 32-bit field is good, would a 23-bit field be even better?
What you found out:
- Too small a field (like 23 bits) gives:
- Too few distinct values ā risk of wrap-around errors (unsoundness).
- No performance gain (still fits in a 32-bit word anyway).
- zkVMs need enough range to represent all register and constraint values safely.
ā
Rule of thumb:
Use fields around 27ā64 bits ā large enough for soundness, small enough for native-word efficiency.
āļø 3. What ānative CPU instructionsā vs āmulti-limbā means
Your question:
What does it mean that arithmetic can use native CPU instructions, without big-integer (multi-limb) operations?
Answer:
- āNativeā means one CPU instruction (
add,mul) per operation ā all in one 32- or 64-bit register. - āMulti-limbā means emulating big integers by combining several registers (e.g., 4Ć64-bit = 256-bit).
ā much slower because it needs loops, carry propagation, and modular reduction.
ā
Small fields ā native ops
ā
Big fields ā software emulation
š§± 4. Why BabyBear still uses 4 bytes in zkVM memory
Your question:
If BabyBear fits in 32 bits, why does the zkVM still split it into 4 bytes in memory?
Reason:
- Itās not for arithmetic, itās for ISA-level accuracy.
- RISC-V defines byte-addressable memory, so every 32-bit word = 4 separate bytes.
- The zkVM must prove every load/store at the byte level (
lb,sb,lw, etc.). - Registers hold one field element (the full 32-bit value),
but memory trace records 4 individual bytes ā one per address cell.
ā
Arithmetic: 1 field element per register
ā
Memory model: 4 field elements (bytes) per 32-bit word
š§© 5. Big picture summary
| Layer | Representation | Reason |
|---|---|---|
| Field arithmetic | Single field element (⤠64 bits) | Native CPU ops |
| Registers | 1 field element per RISC-V register | Fast ALU constraints |
| Memory | 1 byte per field element | Match byte-addressable ISA |
| Proof system | Proves consistency per byte | Sound and accurate trace |