RISC-V Instructions

Resources

Instruction Word

  • RISC-V instructions are 32 bits wide in the base ISA (RV32I / RV64I / RV128I).
  • Some extensions add compressed 16-bit instructions (C extension) or longer 48-/64-bit instructions (for special encodings), but 32-bit is the โ€œnormalโ€ form.

A 32-bit instruction is divided into fields, depending on the format

Register, RAM, SSD, STACK, HEAP

1. Register

  • ๐Ÿงฌ What it is: The smallest and fastest memory inside a CPU.
  • ๐Ÿ“ Size: Typically 32, 64, or 128 bits.
  • โšก Speed: Blazing fast (nanoseconds).
  • ๐Ÿ” Use: Stores data the CPU is immediately operating on (e.g., numbers during calculations).

2. RAM (Random Access Memory)

  • ๐Ÿง  Also